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ADE7566/ADE7569
Preliminary Technical Data
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER SUPPLY CURRENTS
Current in Normal Mode (PSM0)
3.5
TBD
TBD
TBD
TBD
TBD
mA
mA
mA
mA
f CORE = 4.096 MHz, LCD and meter active
f CORE = 1.024 MHz, LCD and meter active
f CORE = 32.768 kHz, LCD and Meter active
f CORE = 4.096 MHz, LCD and meter DSP active,
metering ADC powered down
TBD
TBD
mA
f CORE = 4.096 MHz, LCD active, metering ADC
and DSP powered down
Current in PSM1
Current in PSM2
880
TBD
TBD
TBD
1.5
TBD
TBD
TBD
TBD
μA
μA
μA
μA
μA
f CORE = 4.096 MHz, LCD active
f CORE = 1.024 MHz, LCD active
f CORE = 4.096 MHz, LCD inactive
LCD active with charge pump at 3.3 V + RTC
RTC only
1
2
3
4
5
6
7
These numbers are not production tested but are guaranteed by design and/or characterization data on production release.
See the Terminology section for definition.
Delay between ADC conversion request and interrupt set.
Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at ?40°C, +25°C, +85°C, and +125°C.
Retention lifetime equivalent at junction temperature (T J ) = 85°C as per JEDEC Standard 22 Method A117. Retention lifetime derates with junction temperature.
Test carried out with a maximum of TBD I/Os set to a low output level.
Delay between power supply valid and execution of first instruction by 8052 core.
Rev. PrA | Page 8 of 136
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